Title :
Analog placement based on hierarchical module clustering
Author :
Lin, Po-Hung ; Lin, Shyh-Chang
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Abstract :
In analog layout design, it is very important to reduce the parasitic coupling effects and improve the circuit performance. Consequently, the most important device-level placement constraints are matching, symmetry, and proximity. However, many previous works deal with these constraints separately, and none of them mention how to handle different constraints simultaneously and hierarchically. In this paper, we first give a case study to show the needs of integrating these constraints in a hierarchical manner. Then, we present the first formulation for analog placement based on hierarchical module clustering. Our approach can handle analog placement with various constraint groups including matching, (hierarchical) symmetry, and (hierarchical) proximity groups. To our best knowledge, this is also the first work in the literature to handle floorplanning with the clustering constraint using the B*-tree based representation. Experimental results based on industrial analog designs show that our approach is very effective and efficient.
Keywords :
analogue integrated circuits; integrated circuit layout; tree data structures; trees (mathematics); B*-tree; analog layout design; analog placement; constraint groups; floorplanning; hierarchical module clustering; matching groups; proximity groups; symmetry groups; Algorithm design and analysis; Analog integrated circuits; Circuit optimization; Coupling circuits; Design engineering; Integrated circuit layout; Permission; Research and development; Routing; Simulated annealing; Analog placement; floorplanning;
Conference_Titel :
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-60558-115-6