DocumentCode
474426
Title
A MIPS R2000 implementation
Author
Pinckney, Nathaniel ; Barr, Thomas ; Dayringer, Michael ; McKnett, Matthew ; Jiang, Nan ; Nygaard, Carl ; Harris, David Money ; Stanley, Joel ; Phillips, Braden
Author_Institution
Harvey Mudd Coll., Claremont, CA
fYear
2008
fDate
8-13 June 2008
Firstpage
102
Lastpage
107
Abstract
Thirty-four undergraduates implemented a MIPS R2000 processor for an introductory CMOS VLSI design course. This included designing a microarchitecture in Verilog, developing custom PLA generation and ad-hoc random testing tools, creating a standard cell library, schematics, layout, and PCB test board. The processor was fabricated by MOSIS on an AMI 0.5-micron process, included 160,000 transistors, and ran at 7.25 MHz.
Keywords
CMOS digital integrated circuits; VLSI; microprocessor chips; printed circuits; CMOS VLSI design; MIPS R2000 processor; PCB test board; ad-hoc random testing tools; custom PLA generation; frequency 7.25 MHz; size 0.5 micron; Ambient intelligence; CMOS process; Hardware design languages; Libraries; Microarchitecture; Programmable logic arrays; Radio access networks; Standards development; Testing; Very large scale integration; MIPS; RISC;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
978-1-60558-115-6
Type
conf
Filename
4555790
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