Design of a mask-programmable memory/multiplier array using G4-FET technology

A G4-FET is a 4 gate transistor that combines both JFET and MOS characteristics in a single device that may be fabricated in a standard silicon-on-insulator (SOI) process. In doing so, it enables the conducting channel to be controlled vertically through MOS gates, as well as horizontally, through junction gates. Further, depending upon how it is biased, a single G4-FET can serve as either a not-majority logic gate or as a charge storage-based memory cell. This unique device offers tremendous potential for innovative gate arrays, where real estate can be traded-off between logic and memory functions. In this paper, we take a first look at a mask-programmable G4-FET array that depending upon metal personalization, can function either as a DRAM array or a multiplier.