• DocumentCode
    474498
  • Title

    A “true” electrical cell model for timing, noise, and power grid verification

  • Author

    Menezes, Noel ; Kashyap, Chandramouli ; Amin, Chirayu

  • Author_Institution
    Strategic CAD Labs., Intel Corp., Hillsboro, OR
  • fYear
    2008
  • fDate
    8-13 June 2008
  • Firstpage
    462
  • Lastpage
    467
  • Abstract
    Empirically characterized equation- and table-based cell models have been applied in static timing analysis for decades. These models have been extended to handle a variety of environmental and circuit phenomena over the years. This has given rise to a profusion of cell models that are used to verify circuit functionality and performance. The recent invention of a second-generation of current source models shows the promise of a unified electrical cell model that comprehensively addresses most of the effects that are perceived as accuracy limiters. In this paper, we describe these accuracy limiters and present comprehensive results for a particular current source model [11].
  • Keywords
    constant current sources; timing circuits; current source models; electrical cell model; equation-based cell models; power grid verification; static timing analysis; table-based cell models; unified electrical cell model; Algorithm design and analysis; CMOS technology; Delay effects; Integrated circuit interconnections; Integrated circuit modeling; Performance analysis; Power grids; Propagation delay; Semiconductor device modeling; Timing; Cell models; current source models; static timing analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
  • Conference_Location
    Anaheim, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-60558-115-6
  • Type

    conf

  • Filename
    4555862