DocumentCode
474518
Title
Specify-Explore-Refine (SER): From specification to implementation
Author
Gerstlauer, A. ; Peng, J. ; Shin, D. ; Gajski, D. ; Nakamura, A. ; Araki, D. ; Nishihara, Y.
Author_Institution
Center for Embedded, Comput. Syst. Univ. of California, Irvine, CA
fYear
2008
fDate
8-13 June 2008
Firstpage
586
Lastpage
591
Abstract
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based environment for electronic system-level (ESL) design of space and satellite electronics. As integral part of ELEGANT, the Center for Embedded Computer System (CECS) has developed and supplied the SER tool set. Following a Specify-Explore-Refine methodology, SER supports system-level design space exploration, interactive platform development and automatic model refinement and model generation. The SER engine has been successfully integrated into ELEGANT. With SER at its core, ELEGANT provides a seamless tool chain for modeling verification and synthesis from top-level specification down to embedded HW/SW implementation. ELEGANT and SER have been successfully delivered to JAXA and its suppliers. Tools are currently being deployed in companies like NEC Toshiba Space Systems. Evaluation results prove the feasibility of the approach for design space exploration, rapid virtual prototyping and system synthesis resulting in tremendous productivity and reliability gains. In addition, ELEGANT has been commercialized for general market availability. The SER component has been licensed to InterDesign Technologies, Inc. (IDT) and it is available from, sold and supported by IDT.
Keywords
electronic design automation; embedded systems; hardware-software codesign; integrated circuit modelling; logic design; Center for Embedded Computer System; ELEGANT; JAXA; Japanese Aerospace Exploration Agency; SER engine; SER tool set; automatic model refinement; complete SpecC-based environment; electronic system-level design; embedded HW/SW implementation; interactive platform development; model generation; modeling verification; rapid virtual prototyping; satellite electronics; space electronics; specify-explore-refine methodology; system synthesis; system-level design space exploration; top-level specification; Aerospace electronics; Consumer electronics; Embedded computing; Engines; National electric code; Satellites; Space exploration; Space technology; System-level design; Virtual prototyping; Electronic System-Level (ESL) Design;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
978-1-60558-115-6
Type
conf
Filename
4555884
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