Low voltage analog multipliers based on CMOS inverters

In the paper we consider two examples of analog multipliers suitable for low votage CMOS technology. The second of the circuits presented is an example of newly proposed class of the analog CMOS circuits based on inverters with modified differential steering - separate for N- and P-transistor. This leads to very low supply voltage requirements — thus the necessary supply voltage only slightly exceeds single threshold voltage. Simulation results as well as experimental data for one implementation are presented.