DocumentCode :
475442
Title :
Reversible fourier transform chip
Author :
Skoneczny, M. ; Van Rentergem, Y. ; De Vos, Alexis
Author_Institution :
Technical University of Lodz, POLAND
fYear :
2008
fDate :
19-21 June 2008
Firstpage :
281
Lastpage :
286
Abstract :
A reversible MOS chip, performing an 8-point 8-bit fast Fourier transform has been designed in a standard 0.35 μm c-MOS technology. Special attention has been paid not to let the number of garbage bits proliferate. As much as possible, garbage bits are either avoided or converted into garbage zeroes and then recycled.
Keywords :
Adders; Cost function; Digital circuits; Fast Fourier transforms; Fourier transforms; Hardware; Logic gates; Quantum computing; Temperature; Fast Fourier transform; Reversible computing;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Mixed Design of Integrated Circuits and Systems, 2008. MIXDES 2008. 15th International Conference on
Conference_Location :
Poznan, Poland
Print_ISBN :
978-83-922632-7-2
Electronic_ISBN :
978-83-922632-8-9
Type :
conf
Filename :
4600914
Link To Document :
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