DocumentCode
478835
Title
Pipelined two step iterative matching algorithms for CIOQ crossbar switches
Author
Deng Pan ; Yuanyuan Yang
Author_Institution
Dept. of Comput. Sci., State Univ. of New York Stony Brook, Stony Brook, NY
fYear
2005
fDate
26-28 Oct. 2005
Firstpage
41
Lastpage
50
Abstract
Traditional iterative matching algorithms for VOQ switches need three steps, i.e., request, grant and accept. By incorporating arbitration into the request step, two step iterative matching can be achieved. This enables simpler implementation and shorter scheduling time, while maintaining almost identical performance. As an example of the two step iterative matching algorithms, in this paper we present two step parallel iterative matching (PIM2), and theoretically prove that its average convergence iterations are less than In N + e/(e - 1) for an N X N switch. Furthermore, two step iterative matching algorithms can be efficiently pipelined on CIOQ switches so that two matchings can be obtained in each time slot. We propose a scheme called second of line (SOL) matching to provide two independent virtual switches, with which the pipelining can be achieved without additional scheduling time and arbitration hardware. More importantly, the pipelined algorithms are theoretically guaranteed to achieve 100% throughput for any admissible traffic. Extensive simulations are conducted to show that our analytical result on the average convergence iterations In N + e/(e - 1) is more accurate than the classical result log2 N + 4/3, and to test the performance of different pipelined algorithms on CIOQ switches.
Keywords
convergence of numerical methods; iterative methods; packet switching; scheduling; CIOQ crossbar switches; SOL matching; VOQ switches; arbitration hardware; average convergence iterations; pipelined two step iterative matching algorithms; scheduling time; second of line matching; two step parallel iterative matching; virtual switches; Algorithm design and analysis; Analytical models; Convergence; Hardware; Iterative algorithms; Performance analysis; Pipeline processing; Switches; Throughput; Traffic control; convergence; iterative algorithms; pipeline; scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Architecture for networking and communications systems, 2005. ANCS 2005. Symposium on
Conference_Location
Princeton, NJ
Print_ISBN
978-1-59593-082-8
Type
conf
Filename
4675264
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