Title :
FPGA Design and Implementation of an Improved 32-bit Binary Logarithm Converter
Author :
Li, Zhijun ; An, Jianping ; Yang, Miao ; Yang Jing
Author_Institution :
Dept. of Electron. Eng., Beijing Inst. of Technol., Beijing
Abstract :
This paper presents an improved 32-bit binary logarithm converter, which is optimized according to the characteristics of Xilinx Virtex4 series FPGA. The implementation in FPGA denotes that our improved method not only costs less resources but also has much higher speed. Meanwhile a novel and simple error correction method is proposed. It reduces the converter error to only one half of the Metchell´s method. The analytical results of the approximation error are confirmed by numerical simulation results.
Keywords :
approximation theory; convertors; digital arithmetic; error correction; field programmable gate arrays; FPGA design; Metchell method; Xilinx Virtex4 series FPGA; approximation error; binary logarithm converter; error correction method; numerical simulation; word length 32 bit; Approximation error; Approximation methods; Arithmetic; Costs; Design engineering; Design optimization; Error correction; Field programmable gate arrays; Numerical simulation; Paper technology;
Conference_Titel :
Wireless Communications, Networking and Mobile Computing, 2008. WiCOM '08. 4th International Conference on
Conference_Location :
Dalian
Print_ISBN :
978-1-4244-2107-7
Electronic_ISBN :
978-1-4244-2108-4
DOI :
10.1109/WiCom.2008.558
