Title :
Challenges of programming multi-core microprocessors
Author_Institution :
Microsoft Res. Cambridge, Cambridge, UK
Abstract :
In this presentation we describe some of the programming difficulties posed by multi-core microprocessors. The presentation begins with a review of existing techniques for implicitly deriving parallel programs from sequential code and for writing explicitly parallel programs. We claim that many of the programming abstractions for parallel program have been honed for the developed of closed world software like operating system kernels and are not suitable for application development in a modular manner. We then review some new technology from various research groups around the world that shows promise for multi-core development. Examples of mechanisms describe include join patterns, transactional memory and nested data parallelism. We also describe some of the considerable verification challenges confronted by parallel program developers and then review some advances in formal analysis which may help to mitigate this issue. Finally, we consider the evolution of current multi-processor architectures and discuss whether there are alternative ways of organizing processors, memories and other compute elements to support a high level parallel processing programming paradigm.
Keywords :
multiprocessing systems; parallel architectures; parallel programming; program verification; application development; formal analysis; high level parallel processing programming paradigm; multicore microprocessor programming; multiprocessor architectures; nested data parallelism; operating system kernels; programming abstractions; sequential code; transactional memory; verification challenges;
Conference_Titel :
Programmable Hardware Systems, 2008 IET and Electronics Weekly Conference on
Conference_Location :
London
Print_ISBN :
978-0-86341-947-8