• DocumentCode
    480106
  • Title

    Study on the Multi-pipeline Reconfigurable Computing System

  • Author

    Yong-Sheng, Yin ; Gao-Ming, Du ; Yu-Kun, Song

  • Author_Institution
    Inst. of VLSI Design, Hefei Univ. of Technol., Hefei
  • Volume
    4
  • fYear
    2008
  • fDate
    12-14 Dec. 2008
  • Firstpage
    122
  • Lastpage
    125
  • Abstract
    The hybrid reconfigurable computing system that couples the traditional processor with the reconfigurable hardware is becoming a mainstream today. A new hybrid reconfigurable computing system MPRS (Multi-Pipeline Reconfigurable System) is presented, which has multiple linear arrays for pipelined applications. MPRSpsila architecture and the mapping method are discussed. Firstly, a complete system including the MPRS simulator at behavior level and its programming environment is built. Secondly, a systematic approach to MPRS arrays based on the DGRV (Dependency Graph with Reconfigurable Variable) is discussed, and the objective functions and design constraint are analyzed. Finally, this paper tests several typical applications.
  • Keywords
    graph theory; pipeline processing; programming environments; reconfigurable architectures; MPRS simulator; dependency graph with reconfigurable variable; hybrid reconfigurable computing system; mapping method; multipipeline reconfigurable computing system; multiple linear arrays; programming environment; reconfigurable hardware; traditional processor; Application software; Concurrent computing; Coprocessors; Delay; Hardware; Job shop scheduling; Parallel processing; Pipelines; Processor scheduling; Runtime; multi-pipeline; reconfigurable; systematic approach;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Software Engineering, 2008 International Conference on
  • Conference_Location
    Wuhan, Hubei
  • Print_ISBN
    978-0-7695-3336-0
  • Type

    conf

  • DOI
    10.1109/CSSE.2008.1068
  • Filename
    4722578