DocumentCode :
48038
Title :
Saturation Current and On-Resistance Correlation during During Repetitive Short-Circuit Conditions on SiC JFET Transistors
Author :
Berkani, M. ; Lefebvre, Serge ; Khatir, Z.
Author_Institution :
Centre Nat. de la Rech. Sci., Cachan, France
Volume :
28
Issue :
2
fYear :
2013
fDate :
Feb. 2013
Firstpage :
621
Lastpage :
624
Abstract :
This letter presents a correlation between the reduction of the saturation current level and increase of on-state resistance and the top-metal ageing of normally ON SiC junction gate field effecttransistors. For this study, ageing has been obtained using repetitive short-circuit operations. Among monitored parameters during ageing, on-state resistance and short-circuit current level are those, which have the strongest evolution. The top-metal degradation has been characterized via the on-state resistance measurement during ageing. In particular, we clearly show that the top-metal restructuration due to ageing leads to an additional voltage drop between gate and source terminals and results to a lower gate-source junction voltage.
Keywords :
ageing; electric potential; electric resistance; junction gate field effect transistors; short-circuit currents; silicon compounds; JFET transistor; SiC; gate terminal; gate-source junction voltage; junction gate field effect transistor; on-state resistance correlation; on-state resistance measurement; repetitive short-circuit condition; repetitive short-circuit operation; saturation current level; short-circuit current level; source terminal; top-metal ageing; top-metal degradation; top-metal restructuration; voltage drop; Aging; JFETs; Logic gates; Resistance; Silicon carbide; Wires; Ageing; current limiter; junction gate field-effect transistors (JFETs); short circuit; silicon carbide;
fLanguage :
English
Journal_Title :
Power Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2012.2215629
Filename :
6314491
Link To Document :
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