A current-limiting protection strategy for the combined three-phase inverter

For the medium or low voltage high-current applications, combined three-phase inverter topology is presented and mathematical model in dq coordinates is built. Several current-limiting methods are commonly used. They have their own shortcomings. Thus, a new strategy of hardware blockage with instantaneous currents, combined by software current limit with the average current is presented. Using fast response of hardware circuit, current will be reduced to a certain scope. Then, software current limit is working in TMS320LF2407 control chip. Considering a short-circuit circumstances, many waveforms were received from the 400 KVA 50 HZ experimental machine. The experimental results show that the method not only ensures safe operation, but also improves dynamic capability and reduces the distortion of the waveform.