A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source Applications

This work presents a multi-channel, time-to-digital converter (TDC) based on a field-programmable gate array (FPGA). A thorough characterization of the TDC, based on a Xilinx Virtex-6 FPGA, is presented and several performance parameters are described, including distortions due to the FPGA architecture, temperature effects, intra-chip position variation, and chip-to-chip variation. An optimized TDC exhibits 10 ps LSB duration, an integral non-linearity range of 3.86 LSB, and an input range longer than 100 μs. Total time uncertainty (single-shot jitter) is measured to be 19.6 ps at a time difference of 40 ns, and less than 400 ps at a time difference larger than 100 μs.