Ultra fast locking, low jitter, auto-ranging phase-locked loop

Zero delay buffer (ZDB) PLLs have low long term jitter (LTJ) requirements and demand a wide frequency range VCO design. This paper describes an "auto-ranging" technique that dynamically switches between different frequency ranges to overcome the tuning range limitation of a typical voltage controlled oscillator (VCO). This allows a more stable loop, much tighter control over VCO gain (K_VCO) and consequently, improved (at least 2times achievable) LTJ performance. A number of high-performance applications require phase-locked-loops (PLLs) that can achieve phase lock in times less than 1 mus. To achieve these lock times special circuitry is required. This paper describes a PLL with a lock-aid circuit that achieves best-in-class lock times. The PLL has been designed in 135 nm CMOS technology and illustrates the value of novel digital add-on circuits for PLLs in small feature size technologies.