Power Efficient Class AB Op-Amps With High and Symmetrical Slew Rate

Author

Aguado-Ruiz, Jesus ; Lopez-Martin, Antonio ; Lopez-Lemus, Javier ; Ramirez-Angulo, Jaime

Author_Institution

Dept. of Electr. & Electron. Eng., Public Univ. of Navarra, Pamplona, Spain

Volume

22

Issue

4

fYear

2014

fDate

Apr-14

Firstpage

943

Lastpage

947

Abstract

Various class AB two-stage op-amps with high and approximately symmetrical slew rate and very simple architecture are introduced in this brief. A current replicating branch with scaled-down transistors in combination with adaptive loads is used to implement a push-pull output stage with maximum output current several times higher than the bias current. Postlayout simulation and measurement results are presented and verify a 400%-500% slew rate and 80%-100% GB enhancement with only 5% additional quiescent power dissipation and 20% silicon area increase.

Keywords

CMOS analogue integrated circuits; operational amplifiers; GB enhancement; adaptive loads; class AB two-stage op-amps; current replicating branch; maximum output current; push-pull output stage; quiescent power dissipation; scaled-down transistors; silicon area increase; symmetrical slew rate; CMOS analog integrated circuits; Class AB operation; operational amplifiers; symmetrical slew rate;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2013.2256946

Filename

6514045