DocumentCode :
486732
Title :
Asynchronous Finite State Machines: Simulations with Imposed Processing Constraints
Author :
Kwankam, S.Y. ; Kaliski, M.E. ; Miller, A.T. ; Johnson, T.L.
Author_Institution :
ENSP, Universite de Yaounde, Yaounde, Cameroun
fYear :
1986
fDate :
18-20 June 1986
Firstpage :
1469
Lastpage :
1470
Abstract :
The action of computer control systems on continuous-time discrete-state processes can be accurately represented by asynchronous finite-state machines, and, in particular, a subclass of these machines termed "simple asynchronous machines", or SAMs. To understand the role that practical signal processing constraints may play in characterizing SAM behavior, a simulator capable of incorporating such constraints has been written. The architecture of this simulator and examples of its use are presented.
Keywords :
Automata; Circuit simulation; Computational modeling; Computer architecture; Contracts; Counting circuits; Force control; Logic functions; Multiplexing; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
American Control Conference, 1986
Conference_Location :
Seattle, WA, USA
Type :
conf
Filename :
4789158
Link To Document :
بازگشت