Linear Token Passing based Bus Interface Unit for a Fault Tolerant Multiprocessor Testbed

The Flight Control Division of the Air Force Flight Dynamics Laboratory is producing an inhouse testbed based upon the concepts developed in the Advanced Multiprocessor Control Architecture Development (AMCAD) project. This paper will address the design of the Bus Interface Unit (BIU) used to connect each processing module to a linear token passing bus based network. This network is comprised of four independent busses and is implemented using the MC68824 IEEE 802.4 bus controller chips. The concepts of the AMCAD project, as well as the functional composition of the BIU design, will be described.