• DocumentCode
    49103
  • Title

    A Pseudo Cross-Coupled Switch-Capacitor Based DC-DC Boost Converter for High Efficiency and High Power Density

  • Author

    Das, Teerath ; Prasad, Santasriya ; Dam, S. ; Mandal, P.

  • Author_Institution
    Cadence Design Syst., Inc., Bangalore, India
  • Volume
    29
  • Issue
    11
  • fYear
    2014
  • fDate
    Nov. 2014
  • Firstpage
    5961
  • Lastpage
    5974
  • Abstract
    In this paper, we propose a fully-integrated switch-capacitor (SC) dc-dc boost converter having high power efficiency, low output ripple, and high power density. It uses a switching scheme called nonoverlapped rotational time-interleaving (NORI) which eliminates shoot-through loss as well mitigates the adverse effect of dead times between successive charging and discharging phases which results into a small ripple. A basic cross-coupled voltage doubler has been adopted to implement the NORI scheme working over a wide range of switching frequencies. Dynamic adjustment of the frequency provides high power density as well as maintains high power efficiency over a wide load current range. The proposed converter has been fabricated in 0.18- μm CMOS thick gate process for 3.3 to 5.5 V conversion and output ripple not more than 0.5% of the output voltage. The converter uses only 440 pF to deliver up to 25 mA at 5.3 V regulated output. The measured peak power efficiency is 89% at 20 mA for unregulated output. With mixed mode regulations, the measured efficiency of the converter including analog blocks is 83.5% at 15 mA, while the overall efficiency is 75%. Power density of the designed converter is more than 0.85 W/mm 2 considering the capacitor area.
  • Keywords
    CMOS integrated circuits; DC-DC power convertors; switched capacitor networks; CMOS thick gate process; NORI scheme; SC dc-dc boost converter; capacitance 440 pF; charging phases; current 15 mA; current 20 mA; dead times; discharging phases; efficiency 75 percent; efficiency 83.5 percent; efficiency 89 percent; high power density; high power efficiency; load current range; mixed mode regulations; nonoverlapped rotational time-interleaving; pseudo cross-coupled switch-capacitor; size 0.18 mum; switching frequencies; voltage 3.3 V to 5.5 V; voltage doubler; Capacitance; Capacitors; Clocks; Materials requirements planning; Switches; Topology; Transistors; Dynamic frequency tuning; dynamic leaker; power density; shoot-through current; switched-capacitor (SC) dc–dc converters;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8993
  • Type

    jour

  • DOI
    10.1109/TPEL.2014.2297972
  • Filename
    6702491