• DocumentCode
    49225
  • Title

    Neuromorphic VLSI Bayesian integration synapse

  • Author

    Aggarwal, A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
  • Volume
    51
  • Issue
    3
  • fYear
    2015
  • fDate
    2 5 2015
  • Firstpage
    207
  • Lastpage
    209
  • Abstract
    Bayesian integration is thought to be used by the brain for optimal decision-making based on information from different sources. Recent evidence indicates that the hippocampal place cells use this mechanism to integrate information at the level of a single cell as opposed to that at the network level as postulated earlier. Therefore a synapse circuit is proposed, which can perform Bayesian integration on three inputs and present results from its implementation in silicon.
  • Keywords
    Bayes methods; VLSI; decision making; Si; brain; decision-making; neuromorphic VLSI Bayesian integration synapse; synapse circuit;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2014.4187
  • Filename
    7029774