DocumentCode
492688
Title
Multicore SoC for embedded systems
Author
Arakawa, Fumio
Author_Institution
CPU Dev. Dept. 1, Renesas Technol. Corp. Tokyo, Tokyo
Volume
01
fYear
2008
fDate
24-25 Nov. 2008
Abstract
Multicore SoC is one of the most promising approaches to realize high-performance. A SuperHtrade (SH) embedded processor core, SH-X3, implemented in a 90-nm CMOS process, achieved 1080 Dhrystone MIPS, and 4.2 GFLOPS, and is ready for multicore SoCs. Its power performance ratio reaches to as high as 3000 MIPS/W. Some multicore SoCs for embedded systems are developed, and we still have issues to solve for future multicore systems.
Keywords
CMOS integrated circuits; embedded systems; system-on-chip; CMOS process; Dhrystone MIPS; GFLOPS; SH-X3; SuperH embedded processor core; multicore SoC; performance ratio; CMOS process; CMOS technology; Embedded system; Frequency; Multicore processing; Personal communication networks; Power measurement; Process design; Semiconductor device measurement; System-on-a-chip; AMP; SMP; SoC; embedded systems; multicore;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location
Busan
Print_ISBN
978-1-4244-2598-3
Electronic_ISBN
978-1-4244-2599-0
Type
conf
DOI
10.1109/SOCDC.2008.4815602
Filename
4815602
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