DocumentCode
492762
Title
Crosstalk avoidance method considering multi-aggressors
Author
Jung, Sibaek ; Zang, Naeun ; Park, Eunsuk ; Kim, Juho
Author_Institution
Design Autom. Team, Hynix Semicond. Inc., Icheon
Volume
02
fYear
2008
fDate
24-25 Nov. 2008
Abstract
This As manufacturing technology scales to smaller dimensions, wire size is increasing and spacing between wires is decreasing, the influence of interconnect becomes dominant factor. Coupling capacitance between wires induces crosstalk. Crosstalk causes functional and temporal problem. In this paper, we propose timing window shift method considering multi-aggressors to reduce delay degradation. We assume that crosstalk induced delay degradation is proportional to coupling capacitance and timing window overlap. In this assumption, we model Aggressive Factor which represents the amount of crosstalk induced delay degradation. Proposed method is experimented with ISCAS85 benchmark circuit. We have a result that average of 4.85% crosstalk induced delay degradation minimization.
Keywords
capacitance; crosstalk; delays; interconnections; logic gates; ISCAS85 benchmark circuit; aggressive factor; coupling capacitance; crosstalk avoidance method; delay degradation; interconnect; multi-aggressors; timing window shift method; Capacitance; Coupling circuits; Crosstalk; Degradation; Delay; Integrated circuit interconnections; Manufacturing; Minimization; Timing; Wires; crosstalk; multi-aggressors;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location
Busan
Print_ISBN
978-1-4244-2598-3
Electronic_ISBN
978-1-4244-2599-0
Type
conf
DOI
10.1109/SOCDC.2008.4815708
Filename
4815708
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