A programmable memory BIST for embedded memory

Author

Hong, WonGi ; Choi, JungDai ; Chang, Hoon

Author_Institution

Dept. of Comput., Soongsil Univ., Seoul

Volume

02

fYear

2008

fDate

24-25 Nov. 2008

Abstract

Recent development in System-on-Chip(SOC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. Thus, the proposed scheme supports the various memory test algorithms to test different types of memory modules in SOC. Moreover, it is able to At-speed test in a memory module. Consequently, the proposed is more efficient in terms of test cost.

Keywords

built-in self test; digital storage; embedded systems; finite state machines; integrated circuit testing; memory architecture; modules; system-on-chip; embedded memory; finite-state-machine-based BIST architecture; memory modules; memory test algorithms; programmable memory BIST; system-on-chip technology; Algorithm design and analysis; Automatic testing; Built-in self-test; Costs; Electronic mail; Embedded computing; Fault detection; Life testing; Manufacturing; Read-write memory; BIST; Ebmedded memory; Programmable;

fLanguage

English

Publisher

ieee

Conference_Titel

SoC Design Conference, 2008. ISOCC '08. International

Conference_Location

Busan

Print_ISBN

978-1-4244-2598-3

Electronic_ISBN

978-1-4244-2599-0

Type

conf

DOI

10.1109/SOCDC.2008.4815717

Filename

4815717