DocumentCode
492796
Title
Embedded testing for SOC functionality
Author
Hahanov, Vladimir ; Pokrova, Sophia ; Yves, Tiecoura ; Gorobets, Andriy
Author_Institution
Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine
fYear
2009
fDate
24-28 Feb. 2009
Firstpage
29
Lastpage
33
Abstract
Innovative testable design technologies of hardware and software, which oriented on making graph models of SoC components for effective test development and SoC component verification, are considered.
Keywords
graph theory; integrated circuit design; integrated circuit testing; system-on-chip; SOC functionality; SoC component verification; embedded testing; graph models; testable design technologies; Digital systems; Embedded software; Hardware; Software libraries; Software maintenance; Software standards; Software testing; Space technology; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
CAD Systems in Microelectronics, 2009. CADSM 2009. 10th International Conference - The Experience of Designing and Application of
Conference_Location
Lviv-Polyana
Print_ISBN
978-966-2191-05-9
Type
conf
Filename
4839747
Link To Document