DocumentCode :
493091
Title :
Design and Implementation of Hardware Fusion Technology for Super Sink Node
Author :
Xiao, Xianjian ; Fan, Tanghuai ; Wang, Huibin ; Xu, Lizhong
Author_Institution :
Coll. of Comput. & Inf. Eng., HoHai Univ., Nanjing
Volume :
1
fYear :
2009
fDate :
25-26 April 2009
Firstpage :
244
Lastpage :
248
Abstract :
For the shortage of the traditional sink nodes of WSNs in refining and compressing the uplink data, a new method is proposed to design and implement a super sink node with the hardware fusion technology. This method adopts FPGA as the platform of the node and applies BP neural networks with systolic array structure, map arithmetic, stream line and nonlinear activation functions to achieve the hardware fusion of uplink data. The experiment shows that the proposed method has decreased the total amount of data, reduced the transmission bandwidth and improved the performance of real-time transmission.
Keywords :
backpropagation; field programmable gate arrays; neural nets; sensor fusion; systolic arrays; wireless sensor networks; BP neural network; FPGA; field programmable gate arrays; hardware fusion technology; map arithmetic; nonlinear activation function; real-time transmission bandwidth; super sink node design; systolic array structure; uplink data fusion; wireless sensor network; Bandwidth; Biological neural networks; Computer networks; Data engineering; Design engineering; Educational institutions; Field programmable gate arrays; Neural network hardware; Signal processing algorithms; Wireless sensor networks; BP neural networks; FPGA; hardware fusion; sink node;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networks Security, Wireless Communications and Trusted Computing, 2009. NSWCTC '09. International Conference on
Conference_Location :
Wuhan, Hubei
Print_ISBN :
978-1-4244-4223-2
Type :
conf
DOI :
10.1109/NSWCTC.2009.81
Filename :
4908256
Link To Document :
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