An Adjustable Fine-Grain Cache Assignment Scheduling Algorithm Based on Multi-core Architecture

Nowadays, there is a trend to increase the number of processors on a single chip leading to the rapid development of multi-core architecture. Threads are scheduled concurrently on multi-core processors and share the processorpsilas second-level (L2) cache. A major problem faced by such architectures is cache contention, where processorpsilas cores compete for usage of the single shared L2 cache. Uncontrolled cache allocation for threads can easily leads to serious problem, such as thread starvation, priority inversion which threaten to processorpsilas utilization ratio and system performance. To address this problem, an adjustable fine-grain cache assignment scheduling algorithm which allocates suitable cache to running threads is proposed. By experiment verification, the adjustable fine-grain cache assignment scheduling algorithm achieves higher performance than that adopting conventional LRU scheduling algorithm. Consequently, adjustable fine-grain cache assignment improves the operating system performance and utilization effectively.