• DocumentCode
    493334
  • Title

    Design optimization and stamper fabrication of light guiding plates using silicon based micro-features

  • Author

    YU, Jyh-Cheng ; Hsu, Pei-Kai

  • Author_Institution
    Nat. Kaohsiung First Univ. of Sci. & Technol., Nanzih
  • fYear
    2009
  • fDate
    1-3 April 2009
  • Firstpage
    202
  • Lastpage
    207
  • Abstract
    This study applies a novel fabrication process of molding stamper that combines anisotropic wet etching of silicon-on-insulator (SOI) wafers with electroforming to produce precision stampers. Micron-size features, such as trapezoidal grooves and prisms, can be accurately fabricated and distributed. Because the feature geometry and the distribution can be accurately realized using the proposed scheme, the design optimization of light guide plate (LGP) become realistic. By observing the illumination characteristics of LED edge-lit LGP, the distribution pattern of the LGP is transformed into the parameter design of 7 anchor spacing and the spacing modulation amplitude. This study manipulates the distribution parameters using the fuzzy optimization to obtain a LGP design with high illumination uniformity. The design of a LGP of 3.5 inch using LED light source is used as an illustrated example. The optical software, TracePro is applied to simulate the luminance performance. The optimization converges quickly and provides the optimum design with an average brightness of 2266 (nit) and uniformity of 90% without any use of diffusive sheets. The application demonstrates the feasibility and effectiveness of the proposed scheme.
  • Keywords
    electroforming; etching; light emitting diodes; micromechanical devices; moulding; optimisation; silicon-on-insulator; LED edge-lit LGP; LED light source; TracePro; anisotropic wet etching; brightness; design optimization; diffusive sheets; electroforming; fuzzy optimization; light emitting diodes; light guiding plates; luminance performance; molding stamper; optical software; prisms; silicon based microfeatures; silicon-on-insulator wafers; size 3.5 inch; spacing modulation amplitude; stamper fabrication; trapezoidal grooves; Amplitude modulation; Anisotropic magnetoresistance; Design optimization; Fabrication; Geometry; Light emitting diodes; Light sources; Lighting; Silicon on insulator technology; Wet etching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Test, Integration & Packaging of MEMS/MOEMS, 2009. MEMS/MOEMS '09. Symposium on
  • Conference_Location
    Rome
  • Print_ISBN
    978-1-4244-3874-7
  • Type

    conf

  • Filename
    4919539