FPGA based hardware design of high speed compact T/R unit controller

This paper presents Design and Development of ldquoFPGA based hardware design of high speed compact T/R unit controllerrdquo of active phased array Radar. This controls 2-T/R modules integrated in each of the T/R Unit and interfaced over a 10-Mbps duplex serial link (multi drop LVDS bus interface). The Compact T/R Unit Controller generates the necessary control signals required for normal and calibration operation as well as monitors the status of the T/R modules. The hardware is implemented using Xilinx FPGA along with flash memory for calibration and data storage. Compact T/R unit controller PCB Layout design is done optimally using control impedance techniques. Layout is done to take care of crosstalk, reflections and Electromagnetic Interference (EMI) issues. The PCB is designed and fabricated using multilayer concept to ensure Electromagnetic Compatibility (EMC) so as to meet the high-speed performance requirements of control signals required for T/R modules.