Title :
Designing with Virtex-5 FPGA Implement surveillance system using Virtex-5 FPGA
Author_Institution :
ASIC/Chip Division, eInfochips Ltd, India
Abstract :
Virtex5 - A cost effective solution for surveillance application. Availability of ready to use IP cores reduces TTM. Clocking resources makes life easier for application having multiple clock domains. High performance DSP blocks help run algorithms at desired frequency.
Keywords :
clocks; field programmable gate arrays; video surveillance; FPGA design; Virtex-5 FPGA; implementation plan; surveillance system;
Conference_Titel :
Latest Technologies and Tools in Electronic Design, 2008 The Institution of Engineering and Technology - The
Conference_Location :
London
