DocumentCode
494877
Title
Designing with Virtex-5 FPGA Implement surveillance system using Virtex-5 FPGA
Author
Ranpura, Nilesh
Author_Institution
ASIC/Chip Division, eInfochips Ltd, India
fYear
2008
fDate
4-4 Sept. 2008
Firstpage
1
Lastpage
10
Abstract
Virtex5 - A cost effective solution for surveillance application. Availability of ready to use IP cores reduces TTM. Clocking resources makes life easier for application having multiple clock domains. High performance DSP blocks help run algorithms at desired frequency.
Keywords
clocks; field programmable gate arrays; video surveillance; FPGA design; Virtex-5 FPGA; implementation plan; surveillance system;
fLanguage
English
Publisher
iet
Conference_Titel
Latest Technologies and Tools in Electronic Design, 2008 The Institution of Engineering and Technology - The
Conference_Location
London
Type
conf
Filename
5154392
Link To Document