Title :
Weighted Lee Algorithm on Rectilinear Steiner Tree with Obstacles and Boundary
Author :
Li, Xueliang ; Luo, Yang
Author_Institution :
LPMC-TJKLC, Nankai Univ., Tianjin, China
fDate :
March 31 2009-April 2 2009
Abstract :
This paper presents a new model for VLSI routing in the presence of obstacles and boundary. A new approach for reduction of the routing area is proposed, and a modified Lee algorithm - weighted Lee algorithm is applied on the extended Hanan grid to compute sub-optimal RSMT in O(n2(n + m)2log(n + m)) time, where n is the number of terminals, m is the number of vertices of obstacles and boundary.
Keywords :
VLSI; circuit complexity; integrated circuit design; network routing; trees (mathematics); VLSI routing; extended Hanan grid; rectilinear Steiner minimum tree; routing area reduction; suboptimal RSMT; weighted Lee algorithm; Algorithm design and analysis; Combinatorial mathematics; Computer science; Grid computing; Integrated circuit interconnections; Polynomials; Routing; Steiner trees; Very large scale integration; Wires; boundary; extended Hanan grid; obstacles; rectilinear Steiner tree; weighted Lee algorithm;
Conference_Titel :
Computer Science and Information Engineering, 2009 WRI World Congress on
Conference_Location :
Los Angeles, CA
Print_ISBN :
978-0-7695-3507-4
DOI :
10.1109/CSIE.2009.178
