GAP/D: VLSI Hardware for Parallel and Adaptive Distributed Genetic Algorithms

Author

Kobayashi, Kazutaka ; Yoshida, Norihiko ; Narazaki, Shuji

Author_Institution

InterDesign Technol. Inc., Japan

Volume

1

fYear

2009

fDate

24-26 April 2009

Firstpage

95

Lastpage

98

Abstract

This paper presents GAP/D, a VLSI implementation of a dynamic adaptation scheme for the frequency of inter-deme migration in distributed genetic algorithms (GA). Distributed GA, or multi-deme-based GA, uses multiple populations which evolve concurrently. The purpose of dynamic adaptation is to improve convergence performance so as to obtain better solutions. Through simulation experiments, we proved that our scheme achieves better performance than fixed frequency migration schemes.

Keywords

VLSI; distributed algorithms; genetic algorithms; integrated circuit design; parallel algorithms; VLSI hardware; adaptive distributed genetic algorithm; dynamic adaptation; fixed frequency migration scheme; multideme-based GA; parallel genetic algorithm; Concurrent computing; Distributed computing; Frequency; Genetic algorithms; Genetic mutations; Hardware; Parallel processing; Process design; Random number generation; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computational Sciences and Optimization, 2009. CSO 2009. International Joint Conference on

Conference_Location

Sanya, Hainan

Print_ISBN

978-0-7695-3605-7

Type

conf

DOI

10.1109/CSO.2009.454

Filename

5193650