DocumentCode
496512
Title
A 12-bit 125-MHz segmented current-steering DAC for communication application
Author
Tao, Charles ; Lu, Pingping ; Li, Ning
Author_Institution
Department of Microelectronics, Fudan University, Shanghai, 201203, China
fYear
2006
fDate
6-9 Nov. 2006
Firstpage
1
Lastpage
4
Abstract
A 12-bit 125-MHz digital-to-analog converter (DAC) for communication application is designed. It is based on current-steering segmented architecture and modified Q2 random walk switching scheme to obtain 12-bit accuracy. A new voltage swing reduced driver (VSRD) is implemented to promote the dynamic performance. The DAC uses 0.18 µm 1.8 V standard digital CMOS technology. The die area (core) is 2.7 × 2.1mm2 and power consumption is 37.1mA.
Keywords
DAC; VSRD; current-steering; segmented;
fLanguage
English
Publisher
iet
Conference_Titel
Wireless, Mobile and Multimedia Networks, 2006 IET International Conference on
Conference_Location
hangzhou, China
ISSN
0537-9989
Print_ISBN
0-86341-644-6
Type
conf
Filename
5195456
Link To Document