DocumentCode :
497189
Title :
Optimized ultra-low thermal budget process flow for advanced High-K / Metal gate first CMOS using laser-annealing technology
Author :
Ortolland, C. ; Ragnarsson, Lars-Ake ; Favia, P. ; Richard, O. ; Kerner, C. ; Chiarella, T. ; Rosseel, E. ; Okuno, Y. ; Akheyar, A. ; Tseng, J. ; Everaert, J.-L. ; Schram, T. ; Kubicek, S. ; Aoulaiche, M. ; Cho, M.J. ; Absil, P.P. ; Biesemans, S. ; Hoffma
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2009
fDate :
16-18 June 2009
Firstpage :
38
Lastpage :
39
Abstract :
This paper presents for the first time the successful integration of laser-only annealing in a high-k / metal gate first process flow with functional ring oscillators. The process has been optimized to limit defect creation, reduce poly-silicon resistance and obtain good capping/high-k intermixing. EOT reduction with less eWF roll-off, excellent device scalability without performance penalty and Vth-matching improvement compared to spike have been achieved.
Keywords :
CMOS integrated circuits; circuit reliability; high-k dielectric thin films; laser beam annealing; oscillators; thermal analysis; advanced high-k-metal gate first CMOS; functional ring oscillator; high-k intermixing; laser-annealing technology; optimized ultra low thermal budget process flow; polysilicon resistance; CMOS process; CMOS technology; High K dielectric materials; High-K gate dielectrics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2009 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-3308-7
Type :
conf
Filename :
5200626
Link To Document :
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