New approach to form EOT-scalable gate stack with strontium germanide interlayer for high-k/Ge MISFETs

Author

Kamata, Yoshiki ; Takashima, Akira ; Kamimuta, Yuuichi ; Tezuka, Tsutomu

Author_Institution

MIRAI-Toshiba, Kawasaki, Japan

fYear

2009

fDate

16-18 June 2009

Firstpage

78

Lastpage

79

Abstract

A new approach to form EOT-scalable high-k/Ge gate stack with a Sr germanide (SrGe_X) interlayer has been demonstrated to avoid drawbacks originating from thermally unstable nature of Ge oxide interlayer. Significant reduction of J_g has been observed due to the new interlayer. A promising EOT scalability is confirmed at around EOT of 1 nm. A record high peak hole mobility of 481 cm²/Vsec for high-k/Ge p-MISFETs has been obtained in LaAlO₃/SrGe_X/Ge p-MISFETs.

Keywords

MISFET; germanium compounds; high-k dielectric thin films; hole mobility; lanthanum compounds; semiconductor devices; strontium compounds; EOT-scalable gate stack; GeO₂; LaAlO₃-SrGe-Ge; germanium oxide interlayer; high-k/germanium MISFET; hole mobility; strontium germanide interlayer; thermally unstable nature; Annealing; Dielectric substrates; Fabrication; High K dielectric materials; High-K gate dielectrics; MISFETs; Scalability; Strontium; Surface reconstruction; Thermal stability;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2009 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4244-3308-7

Type

conf

Filename

5200641