Impact of EOT scaling down to 0.85nm on 70nm Ge-pFETs technology with STI

Author

Mitard, J. ; Shea, C. ; DeJaeger, B. ; Pristera, A. ; Wang, G. ; Houssa, M. ; Eneman, G. ; Hellings, G. ; Wang, W.E. ; Lin, J.C. ; Leys, F.E. ; Loo, R. ; Winderickx, G. ; Vrancken, E. ; Stesmans, A. ; DeMeyer, K. ; Caymax, M. ; Pantisano, L. ; Meuris, M.

fYear

2009

fDate

16-18 June 2009

Firstpage

82

Lastpage

83

Abstract

For the first time, an STI module is integrated in an advanced 70 nm Ge-pFET technology allowing EOT scaling down to 0.85 nm. Gate leakage is kept below 0.2A/cm² and ION is increased inversely proportional to the EOT. The impact of this aggressive EOT scaling on hole mobility is also investigated by temperature measurements down to 4 K, suggesting the presence of defects at different levels of the Si/SiO₂/HfO₂ gate stack.

Keywords

field effect transistors; germanium; hafnium compounds; hole mobility; isolation technology; silicon; silicon compounds; Ge; Si-SiO₂-HfO₂; equivalent oxide thickness; gate leakage; hole mobility; pFET; shallow trench isolation; size 0.85 nm; size 70 nm; Degradation; Dielectric measurements; FETs; Gate leakage; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Passivation; Scattering; Temperature measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2009 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4244-3308-7

Type

conf

Filename

5200643