DocumentCode
497240
Title
Impact of backside Cu contamination in the 3D integration process
Author
Hozawa, Kazuyuki ; Takeda, Kenichi ; Torii, Kazuyoshi
Author_Institution
Central Res. Lab., Hitachi, Ltd., Kokubunji, Japan
fYear
2009
fDate
16-18 June 2009
Firstpage
172
Lastpage
173
Abstract
The impact of backside Cu contamination during the 3D integration process was investigated and found that Cu diffusion was significantly enhanced by stress relief and wafer thinning. The thermal scattering phenomenon of Cu is inevitable even under a low-temperature assembly process, which also caused Cu contamination. To prevent the Cu contamination, an Ar ion implantation for Cu gettering and a SiN Cu barrier is proposed.
Keywords
argon; assembling; copper; cryogenic electronics; diffusion barriers; getters; ion implantation; silicon compounds; surface contamination; thermal analysis; wafer-scale integration; 3D integration process; Cu; SiN; backside contamination impact; copper gettering; ion implantation; low-temperature assembly process; stress relief; thermal scattering phenomenon; wafer thinning; Argon; Assembly; Degradation; Gettering; Ion implantation; Scattering; Silicon compounds; Stress; Surface contamination; Through-silicon vias;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2009 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-3308-7
Type
conf
Filename
5200677
Link To Document