DocumentCode
49783
Title
Accelerating floating-point to fixed-point data type conversion with evolutionary algorithms
Author
Rosa, L.S. ; Toledo, C.F.M. ; Bonato, Vanderlei
Author_Institution
USP, São Paulo, Brazil
Volume
51
Issue
3
fYear
2015
fDate
2 5 2015
Firstpage
244
Lastpage
246
Abstract
The choice of the data type representation has significant impacts on the resource utilisation, maximum clock frequency and power consumption of any hardware design. Although arithmetic hardware units for the fixed-point format can improve performance and reduce energy consumption, the process of tuning the right bit length is known as a time-consuming task, since it is a combinatorial optimisation problem guided by the accumulative arithmetic computation error. A novel evolutionary approach to accelerate the process of converting algorithms from the floating-point to fixed-point format is presented. Results are demonstrated by converting three computing-intensive algorithms from the mobile robotic scenario, where data error accumulated during execution is influenced by external factors, such as sensor noise and navigation environment characteristics. The proposed evolutionary algorithm accelerated the conversion process by up to 2.5 × against the state-of-the-art methods, allowing even further bit-length optimisations.
Keywords
evolutionary computation; floating point arithmetic; mobile robots; accumulative arithmetic computation error; combinatorial optimisation problem; data type representation; evolutionary algorithms; floating-point to fixed-point data type conversion; maximum clock frequency; mobile robotic scenario; power consumption;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2014.3791
Filename
7029829
Link To Document