A 1.5-GHz 63dB SNR 20mW direct RF sampling bandpass VCO-based ADC in 65nm CMOS

This paper presents a bandpass ADC which exploits enhanced time-resolution of a deep submicron CMOS process. Unlike conventional bandpass ADCs that rely on voltage resolution and Gm-LC filters, the proposed ADC employs time-interleaved voltage-controlled oscillators that enable frequency tunable bandstop noise shaping property without a feedback loop. The ADC implemented in 65nm CMOS achieves SNR of 63.3dB for 1MHz signal located at 1.5GHz, while consuming 19.6mW from 1.2V supply.