Title :
High-density 3-D metal-fuse PROM featuring 1.37µm2 1T1R bit cell in 32nm high-k metal-gate CMOS technology
Author :
Kulkarni, Sarvesh H. ; Chen, Zhanping ; He, Jun ; Jiang, Lei ; Pedersen, Brian ; Zhang, Kevin
Author_Institution :
Intel Corporation, Hillsboro, OR, USA
Abstract :
A 4Kbit high-density PROM array design featuring a high-volume manufacturable metal-fuse technology in 32nm high-k metal-gate CMOS is introduced. In contrast to a traditional salicided polysilicon based 2-D fuse cell, the metal-fuse technology enables a 3-D cell topology with program device and fuse element stacked on each other, achieving a 1.37µm2 cell footprint. The 128-row by 32-column array with an asymmetric tunable static sense scheme can operate down to 0.5V and provides multi-bit programming capability. A 100% programming success rate at 2V-1µs condition is achieved along with security protection.
Keywords :
CMOS technology; Electromigration; Fuses; High K dielectric materials; High-K gate dielectrics; Logic arrays; Logic programming; MOS devices; PROM; Temperature; High-density PROM and metal fuse;
Conference_Titel :
VLSI Circuits, 2009 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-1-4244-3307-0
Electronic_ISBN :
978-4-86348-001-8
