Title :
Clock generation & distribution for a 45nm, 8-core Xeon® Processor with 24MB cache
Author :
Tam, Simon ; Leung, Justin ; Limaye, Rahul
Author_Institution :
Intel Corporation, 2200 Mission College Blvd. (SC12-408), Santa Clara, CA 95052, USA
Abstract :
The clock generation and distribution system for a 8-core Xeon® MP processor with 2.3B transistors fabricated on a 45nm 9M CMOS process achieves 21ps clock skew in the un-core before engaging skew compensation and enables I/O link operations up to 6.4GT/s. The clocking system encompasses multiple clock and voltage domains and extensive global and local clock compensation capabilities.
Keywords :
CMOS process; Clocks; Filters; Frequency; Jitter; Phase locked loops; Power generation; Process design; Quantum cascade lasers; Voltage; Xeon®; clocking and QPI; processor;
Conference_Titel :
VLSI Circuits, 2009 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-1-4244-3307-0
Electronic_ISBN :
978-4-86348-001-8
