Tunable duplex LSIs achieved by multiple phase-modulated clocks capable of predicting delay-increase and -decrease faults

Predicting faults, in addition to detecting them, is becoming important to prevent critical errors before they actually occur in highly reliable systems. We propose a novel architecture for predicting faults based on a duplex system. It can predict delay-increase as well as delay-decrease faults by using multiple phase-modulated clocks. An on-chip tunable clock generator changes the phase modulation to chose appropriate reliability. After prediction, it disconnects faulty blocks and continues correct operations. The experimental results from a 90-nm test chip demonstrated correct operations and revealed a reduction in the failure rate by about one twelfth while there was a 28% area overhead compared to a conventional duplex circuit.