DocumentCode
498046
Title
CMOS frequency generation system for W-band radars
Author
Zhang, Ning ; Kenneth, K.O
Author_Institution
Silicon Microwave Integrated Circuits Research Group (SIMICS), Dept. of Elec. and Comp. Eng., Univ. of Florida, 32611, USA
fYear
2009
fDate
16-18 June 2009
Firstpage
126
Lastpage
127
Abstract
A CMOS frequency generation system for W-band radars, including a phase-locked loop (PLL) (55–60 GHz) with a frequency-divided-by-2 output and an offset mixer for generation of a W-band carrier (83–90 GHz) is realized using low leakage transistors of a low cost 65-nm bulk CMOS process. The phase noise of PLL is as low as −87 and −112 dBc/Hz at 1 and 10 MHz offsets. The PLL consumes 46 mW. The total frequency generation system consumes ∼180 mW.
Keywords
CMOS process; CMOS technology; Costs; Frequency conversion; Mixers; Phase locked loops; Phase noise; Radar; Transceivers; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2009 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
978-1-4244-3307-0
Electronic_ISBN
978-4-86348-001-8
Type
conf
Filename
5205416
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