Title :
Information hiding for trusted system design
Author :
Gu, Junjun ; Qu, Gang ; Zhou, Qiang
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Maryland, College Park, MD, USA
Abstract :
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verification methods are developed to validate whether the system meets all the requirements. They cannot detect the existence or show the non-existence of the unknown undesired functionalities. In this paper, we propose a novel approach that converts this problem to a less challenging design quality measuring problem. Our approach is based on information hiding and constraint manipulation of the original system design specification. We lay out the basic requirements for our approach and demonstrate it through the popular graph coloring problem. Results show that information can be embedded into the original graph without significant impact to the solution quality. However, when the same information is added to the graph modified based on our approach, there will be noticeable drop in the solution quality.
Keywords :
VLSI; graph colouring; industrial property; integrated circuit design; integrated circuit testing; security of data; IC testing method; VLSI design intellectual property; computing system; constraint manipulation; data security; design quality measuring problem; graph coloring problem; information hiding; system design specification; trusted IC system design; verification method; Accreditation; Circuit testing; Design engineering; Educational institutions; Fabrication; Hardware; Integrated circuit testing; Manufacturing processes; Process design; System testing; Trusted IC; VLSI design intellectual property; constraint manipulation; graph coloring; information hiding;
Conference_Titel :
Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-6055-8497-3