• DocumentCode
    501272
  • Title

    A Kind of Reconfigurable Linear Feedback Register Design

  • Author

    Zhiyuan, Wang ; Jianhua, Huang ; Ziming, Guan

  • Author_Institution
    Res. Inst. of Inf. Technol., Inf. Eng. Coll., Zhenzhou, China
  • Volume
    2
  • fYear
    2009
  • fDate
    15-17 May 2009
  • Firstpage
    657
  • Lastpage
    660
  • Abstract
    Linear feedback shift register (LFSR) is an important part of sequence cipher. In this paper, we introduce a kind of reconfigurable LFSR design. According to need, it can be configured to be a random LFSR to run over GF (2), GF (28) ,GF (216)or GF (232) in a certain length range. The prototype of the reconfigurable LFSR has been implemented in Altera´s EP2S60F1020C5 FPGA and its highest run clock is 100 MHZ. It is proved by experiment that the reconfigurable LFSR design uses few hardware resources and its performance is stable.
  • Keywords
    field programmable gate arrays; logic design; shift registers; EP2S60F1020C5 FPGA; linear feedback shift register; reconfigurable LFSR design; reconfigurable linear feedback register design; Cryptography; Design engineering; Educational institutions; Electrons; Force feedback; Information technology; Multiprocessor interconnection networks; Prototypes; Shift registers; Switches; LFSR; reconfigurable; stream cipher;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Technology and Applications, 2009. IFITA '09. International Forum on
  • Conference_Location
    Chengdu
  • Print_ISBN
    978-0-7695-3600-2
  • Type

    conf

  • DOI
    10.1109/IFITA.2009.218
  • Filename
    5231438
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=501272