DocumentCode
501626
Title
Metrology at the leading edge
Author
Diebold, Alain C.
Author_Institution
SEMATECH, Austin, TX, USA
fYear
2006
fDate
10-11 Aug. 2006
Firstpage
9
Lastpage
10
Abstract
The challenges facing characterization and metrology of future semiconductor technology is described in the 2005 ITRS Metrology Roadmap. These challenges are driven by the technologies for future device structures that include molecular electronics, spintronics, nanotube and nanowire based electronics, and other futuristic concepts. Although the challenges are separated into the pre and post 32 nm frac12 pitch nodes, these challenges represent the issues facing the extension of CMOS for another 15 years. Additional challenges are described in a section covering measurement needs for technology beyond CMOS. In this presentation, a brief overview of measurement issues will be described for both CMOS extension and beyond CMOS electronics.
Keywords
CMOS integrated circuits; CMOS; molecular electronics; nanotube; nanowire; semiconductor technology; spintronics; Atomic measurements; CMOS technology; Delay; Dielectric measurements; High K dielectric materials; Integrated circuit interconnections; Metrology; Nanoscale devices; Semiconductor films; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering Management Conference, 2006 IEEE/UT
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-0575-6
Electronic_ISBN
978-1-4244-0576-3
Type
conf
DOI
10.1109/UTEMC.2006.5236188
Filename
5236188
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