Title :
ESD evaluation by TLP method on advanced semiconductor devices
Author :
Kato, Katsuhiro ; Fukuda, Yasuhiro
Author_Institution :
OKI Electr. Ind. Co., Ltd., Hachioji, Japan
Abstract :
TLP (Transmission Line Pulse) method is an effective technique to evaluate ESD robustness for advanced ESD protection devices. This paper focuses on silicon on insulator (SOI) ESD protection design and applies TLP analysis to diodes, resistors and NMOS transistors. Design of ESD protection circuits improves by using response analysis methods to TLP waveforms.
Keywords :
electrostatic discharge; network synthesis; semiconductor devices; silicon-on-insulator; transmission lines; ESD protection circuit design; TLP technique; TLP waveforms; advanced ESD protection devices; advanced semiconductor devices; response analysis method; silicon-on-insulator; transmission line pulse method; Assembly; Biological system modeling; Circuit simulation; Circuit testing; Electrostatic discharge; Integrated circuit modeling; Integrated circuit testing; Protection; Semiconductor devices; Silicon on insulator technology;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.
Conference_Location :
Portland, OR
Print_ISBN :
978-1-5853-7039-9
Electronic_ISBN :
978-1-5853-7039-9
