Influence of process and device design on ESD sensitivity of a Silicon Germanium heterojunction bipolar transistor

Author

Voldman, Steven H. ; Lanzerotti, Louis D. ; Johnson, Robb A.

Author_Institution

Commun. R&D Center (CRDC), IBM, Essex Junction, VT, USA

fYear

2001

fDate

11-13 Sept. 2001

Firstpage

362

Lastpage

370

Abstract

Emitter-base design has a significant influence on both the device performance and ESD sensitivity of silicon germanium heterojunction bipolar transistors. HBM and TLP emitter-base measurements of a ldquoself-alignedrdquo and ldquonon-self alignedrdquo SiGe HBT device is shown for the first time. The evaluation of process variations and device design spacings on ESD robustness is evaluated for both positive and negative stress conditions as a function of the salicide location, emitter-base spacing, and collector opening.

Keywords

Ge-Si alloys; electrostatic discharge; heterojunction bipolar transistors; stress analysis; ESD sensitivity; HBM emitter-base measurement; SiGe; TLP; emitter-base design; heterojunction bipolar transistor; salicide location; silicon germanium HBT; stress conditions; Cutoff frequency; Electrostatic discharge; Gallium arsenide; Germanium silicon alloys; Heterojunction bipolar transistors; Process design; Radio frequency; Robustness; Silicon germanium; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.

Conference_Location

Portland, OR

Print_ISBN

978-1-5853-7039-9

Electronic_ISBN

978-1-5853-7039-9

Type

conf

Filename

5254944