Analysis and optimization of distributed ESD protection circuits for high-speed mixed-signal and RF applications

Electrostatic discharge (ESD) protection devices can have an adverse effect on the performance of high-speed mixed-signal and RF circuits. This work presents a detailed s-parameter based analysis of the performance of these circuits with special attention to the distributed ESD protection designs. It has been shown that a 4-stage distributed ESD protection can be beneficial at frequencies greater than 3 GHz. Two generalized design optimization methodologies using coplanar waveguides are developed for the distributed structure to achieve a better impedance match over a broad frequency range. By using this optimized design, an ESD device with a parasitic capacitance of 200 fF will attenuate the RF signal power by only 0.27 dB at 10 GHz. A design strategy is also suggested for high-speed mixed-signal ICs.