DocumentCode
501912
Title
Modular, portable, and easily simulated ESD protection networks for advanced CMOS technologies
Author
Torres, Cynthia A. ; Miller, James W. ; Stockinger, Michael ; Akers, Matthew D. ; Khazhinsky, Michael G. ; Weldon, James C.
Author_Institution
Motorola, Inc., Austin, TX, USA
fYear
2001
fDate
11-13 Sept. 2001
Firstpage
81
Lastpage
94
Abstract
This paper introduces a new distributed active MOSFET rail clamp network that offers surprising advantages in layout area efficiency, bus resistance tolerance, design modularity and ease of reuse. SPICE simulation results using an extended vertical PNP bipolar transistor compact model and a new method for optimizing distributed rail clamp networks are presented along with chip-level test results.
Keywords
MOSFET; SPICE; electrostatic discharge; ESD protection networks; SPICE simulation results; advanced CMOS technologies; chip-level test results; distributed active MOSFET rail clamp network; extended vertical PNP bipolar transistor compact model; Bipolar transistors; CMOS technology; Clamps; Electrostatic discharge; MOSFET circuits; Optimization methods; Protection; Rails; SPICE; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.
Conference_Location
Portland, OR
Print_ISBN
978-1-5853-7039-9
Electronic_ISBN
978-1-5853-7039-9
Type
conf
Filename
5254985
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