DocumentCode :
501917
Title :
GGSCRs: GGNMOS Triggered silicon controlled rectifiers for ESD protection in deep sub-micron CMOS processes
Author :
Russ, Christian C. ; Mergens, Markus P J ; Verhaege, Koen G. ; Armer, John ; Jozwiak, Phillip C. ; Kolluri, Girija ; Avery, Leslie R.
Author_Institution :
Sarnoff Corp., Princeton, NJ, USA
fYear :
2001
fDate :
11-13 Sept. 2001
Firstpage :
22
Lastpage :
31
Abstract :
In this paper, design aspects, operation, protection capability and applications of SCRs in deep sub-micron CMOS are addressed. A novel Grounded-Gate NMOS Triggered SCR device (GGSCR) is introduced and compared to the LVTSCR. Experimental verification, including endurance testing, demonstrates that GGSCRs can fulfill all ESD protection requirements for todays IC applications in different 0.25 um, 0.18 um and 0.13 um CMOS processes.
Keywords :
CMOS integrated circuits; electrostatic discharge; integrated circuit reliability; thyristors; trigger circuits; CMOS IC; ESD protection; deep sub-micron CMOS process; electrostatic discharge; endurance testing; grounded-gate NMOS triggered SCR device; silicon controlled rectifier; size 0.13 mum; size 0.18 mum; size 0.25 mum; Breakdown voltage; CMOS process; CMOS technology; Electrostatic discharge; Europe; Integrated circuit testing; Low voltage; MOS devices; Protection; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.
Conference_Location :
Portland, OR
Print_ISBN :
978-1-5853-7039-9
Electronic_ISBN :
978-1-5853-7039-9
Type :
conf
Filename :
5254990
Link To Document :
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